The future of mobile CPUsTuesday, Feb 19, 2013 · 700 words · approx 4 mins to read
David Kanter, technology raconteur and long standing friend of Beyond3D, was recently published by Ars Technica on “The future of mobile CPUs”. Thankfully he ignored the title and talked about mobile microprocessors as a whole, mostly focusing on the main system-on-chip silicon.
It’s a good article to ease the layman into the basic trends, starting off with a well-worn introduction to Moore’s Law — a term I dislike but that’s held up well in the most recent years of semiconductor manufacture — before feeding the reader into a discussion about how phones and tablets have a different form factor and power requirements, and so will have distinctively different system-on-chip designs going forward.
I tend to agree, assuming the distinctive difference is overwhelmingly the system-on-chip power. Architecturally you’re not going to see much divergence between chips designed for the two product segments; the same CPU and GPU generations will be used in each, connected the same ways, with power envelopes filled to suit. Chip area for mobile products is also interesting. The trend is for more to be spent, especially for silicon aimed solely at high-end tablets, but it’s not getting cheaper per unit area to make highly integrated semiconductors and it’s hard to know how the most cost sensitive vendors will react, if they even can at all.
It’s my disagreements and nitpicks with the article which I’d most like to point out, however. David makes a claim that “licensing costs are typically on a per-unit basis and thus increasingly problematic at high volumes”. Most IP licensing deals actually take that into account, backing per-unit royalties off as volume increases.
David also hints that after a certain threshold of revenue, you might as well have designed certain blocks yourself. He does the reader a disservice not pointing out where that threshold lies. You’d need to be making hundreds of millions of dollars in pure profit to justify designing the bigger blocks yourself and be truly competitive, and be prepared to invest that into a roadmap stretching out for years and years. The more complex blocks are simply too expensive otherwise.
David argues that higher production costs commonly associated with multi-patterning are passed on to customers in the wafer price. It’s hard to know if he means pre- or post-production, but it only holds true for the price paid for the finished product, not just the raw wafer material cost.
David says only two IDMs (integrated device manufacturers, where the manufacture fabs for itself) exist in the mobile device space: Intel and Samsung. That’s simply not true, even if you don’t widen the term as commonly used today and count only those who have their own fabs as well. He mentions a cost delta between IDMs and foundries that’s never outlined. What cost delta exactly?
I also don’t understand how non-Intel 14 nm densities will be comparable to Intel at 22 nm, even with a 20 nm feature size on the metal layers to make it easier to produce. Intel’s common feature size at 22 nm is actually closer to 28 nm.
To top it off, in an article about semiconductors on the receiving end of the most innovation in and drive for lower power consumption today, due to being in incredibly power sensitive devices, he mentions power once.
The range is delineated with “around 1W” for smartphone SoCs, “up to 4W for passively cooled [tablet] device[s]” and “7-8W for [tablet] systems with fans”, which are good ballpark figures, although it’s jarring that he widens the net for active cooling while seemingly capping the other product tiers.
That’s it though, for coverage of the most pressing problem facing the advancement of the sector today. I mention it as my biggest gripe mainly because he’s probably the best equipped person in the technical press to actually talk authoritatively about the subject.
David, please write about power in the series conclusion!